The 555 timer is an integrated circuit that generates timing pulses using external resistors and capacitors. In astable mode, it outputs a continuous square wave; in monostable mode, it generates a single pulse when triggered. With just three external components (R1, R2, C), the 555 creates oscillators, delays, and PWM signals.
No external trigger required — runs automatically when powered
Used for: LED flashers, tone generators, clock signals, PWM
Monostable Mode (One-Shot)
Output normally LOW, goes HIGH for a fixed time when triggered
Requires external trigger pulse to activate
Used for: Switch debouncing, pulse stretching, time delays, missing pulse detection
Which mode do you need?
Continuous repetitive signal → Astable
Single pulse on demand → Monostable
2
Understand the Astable Mode Circuit
In astable mode, the 555 timer oscillates continuously. The standard circuit uses three external components:
Pin connections (astable mode):
Pin
Name
Connection
1
GND
Ground
2
TRIG
Connect to pin 6
3
OUT
Output (square wave)
4
RESET
Connect to VCC (or use for gating)
5
CTRL
0.01µF capacitor to ground (noise bypass)
6
THR
Connect to pin 2 and to capacitor C
7
DIS
Connect between R1 and R2
8
VCC
Positive supply (4.5V – 16V)
How it works:
Capacitor C charges through R1 + R2
When C reaches 2/3 VCC, output goes LOW
Capacitor C discharges through R2 only
When C drops to 1/3 VCC, output goes HIGH
Cycle repeats continuously
3
Calculate Astable Frequency and Duty Cycle
The astable mode formulas determine frequency and timing:
Frequency: f = 1.44 / ((R1 + 2×R2) × C)
Period (total cycle time): T = 1/f = 0.693 × (R1 + 2×R2) × C
Time HIGH: T_high = 0.693 × (R1 + R2) × C
Time LOW: T_low = 0.693 × R2 × C
Duty Cycle: D = (R1 + R2) / (R1 + 2×R2) × 100%
Duty Cycle Limitation
Standard astable configuration always produces duty cycle above 50% because T_high is greater than T_low (charging goes through R1+R2, discharging only through R2). For 50% duty cycle, use the diode modification described in the FAQ.
4
Design an Astable Circuit for Your Frequency
Design process:
Choose your target frequency (e.g., 1 Hz for LED blink, 1 kHz for tone)
Select capacitor C first:
For f under 1 Hz: C = 100µF – 1000µF (electrolytic)
For 1 Hz – 100 Hz: C = 1µF – 100µF
For 100 Hz – 10 kHz: C = 0.01µF – 1µF (ceramic/film)
For over 10 kHz: C = 100pF – 0.01µF (ceramic)
Calculate total resistance: R1 + 2R2 = 1.44 / (f × C)
Choose R1 and R2 ratio for desired duty cycle:
For ~50% duty cycle: R1 small (1kΩ), R2 large
For higher duty cycle: Increase R1 relative to R2
Verify values are in valid range:
R1 + R2: 1kΩ minimum (to limit discharge current)
R1 + R2: 3.3MΩ maximum (for reliable triggering)
Example: 1 Hz LED flasher (1 second period)
Choose C = 10µF
R1 + 2R2 = 1.44 / (1 × 0.00001) = 144kΩ
For ~60% duty: R1 = 47kΩ, R2 = 47kΩ
Check: (47k + 2×47k) = 141kΩ ≈ 144kΩ
5
Understand the Monostable Mode Circuit
In monostable mode, the 555 generates a single pulse when triggered:
Pin connections (monostable mode):
Pin
Name
Connection
1
GND
Ground
2
TRIG
Trigger input (active LOW)
3
OUT
Output (pulse)
4
RESET
Connect to VCC
5
CTRL
0.01µF capacitor to ground
6
THR
Connect to capacitor C
7
DIS
Connect to R1 and capacitor C junction
8
VCC
Positive supply
How it works:
Output normally LOW, capacitor discharged
Negative-going trigger (under 1/3 VCC on pin 2) starts timing
Output goes HIGH, capacitor charges through R1
When C reaches 2/3 VCC, output returns LOW
Waits for next trigger
Trigger Duration
The trigger must be shorter than the output pulse, or the output will stay HIGH until the trigger ends.
6
Calculate Monostable Pulse Width
The monostable pulse width formula is simpler:
Pulse Width: T = 1.1 × R1 × C
Where:
T = Pulse width in seconds
R1 = Timing resistor in ohms
C = Timing capacitor in farads
Design process:
Choose your target pulse width (e.g., 10ms for debouncing)
Select capacitor C:
For T under 1ms: C = 1nF – 100nF
For 1ms – 1s: C = 0.1µF – 100µF
For over 1s: C = 100µF – 1000µF
Calculate R1: R1 = T / (1.1 × C)
Verify R1 is in valid range (1kΩ – 3.3MΩ)
Example: 100ms debounce pulse
Choose C = 10µF
R1 = 0.1 / (1.1 × 0.00001) = 9.1kΩ
Use standard value: 10kΩ
Actual pulse: 1.1 × 10000 × 0.00001 = 110ms
7
Build and Test Your Circuit
Essential additions for reliable operation:
Bypass capacitor: Add 0.1µF ceramic capacitor between VCC (pin 8) and GND (pin 1), as close to the IC as possible
Control voltage bypass: Add 0.01µF capacitor from pin 5 to ground (reduces noise on internal voltage divider)
Output current limiting: If driving LEDs directly, add series resistor (the 555 can source/sink 200mA, but this stresses the IC)
Reset pin: Connect pin 4 to VCC unless you need external reset control
Testing procedure:
Power up without load connected
Verify VCC voltage at pin 8
Check output with oscilloscope or LED indicator
Measure frequency/pulse width and compare to calculated values
Before diving into examples, build your instincts for 555 timer design:
Larger R (R1 or R2) → slower oscillation, longer pulses
Larger C → slower oscillation, longer pulses
R1 controls charge time, R2 controls both charge and discharge
For near-50% duty cycle → make R1 much smaller than R2
The RC connection: The 555 timer works by charging and discharging a capacitor through resistors — the same RC time constant behavior covered in our RC Time Constant guide. The 555 just automates the switching between charge and discharge cycles.
Quick reference example:
R1 = 10kΩ, R2 = 100kΩ, C = 10µF
Frequency = 1.44 / ((10k + 200k) × 10µF) = 0.69 Hz (~1.4 second period)
Duty cycle = (10k + 100k) / (10k + 200k) = 52%
Practical Limitations of the 555
Before building, understand these real-world constraints:
Output current: 200mA max (source or sink), but generates heat — use a transistor for high-current loads
Timing accuracy: Depends heavily on capacitor tolerance (±20% for electrolytics means ±20% timing error)
Supply voltage affects thresholds: Trigger at 1/3 VCC, threshold at 2/3 VCC — voltage sag causes timing drift
Not ideal for very long delays: Capacitor leakage becomes significant beyond ~10 minutes; use a counter IC instead
Output voltage drop: NE555 outputs VCC−1.5V when HIGH, ~0.5V when LOW (CMOS versions are rail-to-rail)
Example: LED Flasher (Astable Mode)
Scenario: Build an LED flasher that blinks approximately once per second with equal on/off times.
Given:
Target frequency: 1 Hz (1 blink per second)
Target duty cycle: ~50% (equal on/off)
Supply voltage: 9V battery
LED forward voltage: 2V, forward current: 20mA
1
Calculate Total Resistance
f = 1.44 / ((R1 + 2R2) × C)
Choose C = 10µF (electrolytic)
R1 + 2R2 = 1.44 / (1 × 0.00001) = 144kΩ
2
Select Resistors for ~50% Duty
For duty cycle close to 50%, make R1 much smaller than R2:
Capacitor is appropriate type for timing (ceramic/film for precision)
Supply voltage is 4.5V – 16V (for NE555)
Output load doesn't exceed 200mA
Red flags:
Frequency much higher/lower than calculated: check capacitor value and type; electrolytic capacitors have large tolerances
Output doesn't oscillate: verify pin 4 (RESET) is connected to VCC, not floating
Erratic timing: add bypass capacitors; check for noise on power supply
Duty cycle can't go below 50%: standard astable can't achieve this; use diode modification or 556 dual timer
Monostable retriggerable when it shouldn't be: trigger pulse is longer than output pulse
Real-World Timing Accuracy
In production circuits, actual timing often differs from calculated values:
Component tolerances dominate: A ±5% resistor combined with a ±20% electrolytic capacitor gives worst-case timing accuracy of ±25%. For timing that matters, use 1% metal film resistors and C0G ceramic or film capacitors (±5% or better).
Temperature effects: Capacitor values drift with temperature — Y5V ceramics can shift ±80% over their temperature range. For outdoor or industrial use, specify C0G/NP0 ceramics or film capacitors.
Supply voltage stability: The 555's thresholds (1/3 and 2/3 VCC) track the supply. Voltage sag under load changes timing. Add a voltage regulator for consistent timing in battery-powered applications.
Common Mistakes
Forgetting Bypass Capacitors
Why it happens: The 555 timer generates switching noise on the power supply.
How to avoid: Always add a 0.1µF capacitor between VCC and GND, as close to the IC as possible. Without it, the circuit may oscillate erratically or trigger falsely.
Using Electrolytic Capacitors for Precision Timing
Why it happens: Electrolytic capacitors have ±20% tolerance and change value with temperature and age.
How to avoid: For timing accuracy better than ±10%, use ceramic (C0G/NP0) or film capacitors. Reserve electrolytics for non-critical timing.
Floating RESET Pin (Pin 4)
Why it happens: If pin 4 is not connected to VCC, noise can trigger an unwanted reset.
How to avoid: Always tie RESET to VCC unless you specifically need external reset control. A floating reset pin stops oscillation or cuts pulses short.
Expecting Exactly 50% Duty Cycle
Why it happens: Standard astable configuration always produces above 50% duty cycle because charging occurs through R1+R2 but discharging only through R2.
How to avoid: For 50% duty cycle, use the diode modification (see FAQ) or a CMOS 555 variant like the 7555.
Overloading the Output
Why it happens: The 555 can source or sink 200mA, but this generates heat and affects timing.
How to avoid: For high-current loads, use the 555 to drive a transistor or MOSFET instead of powering the load directly.
Trigger Pulse Too Long in Monostable Mode
Why it happens: The output stays HIGH as long as the trigger is LOW.
How to avoid: If your trigger pulse is longer than the desired output pulse, add a differentiator (capacitor + resistor) to shorten the trigger to a brief spike.
FAQ
How do I get exactly 50% duty cycle in astable mode?
Add a diode in parallel with R2 (cathode toward pin 7). This allows the capacitor to charge through R1 only and discharge through R2 only, giving T_high = 0.693×R1×C and T_low = 0.693×R2×C. Set R1 = R2 for 50% duty cycle.
What's the difference between NE555 and 7555/TLC555?
The NE555 is the original bipolar version — it works from 4.5-16V, can source/sink 200mA, but draws ~10mA quiescent current and has output voltage drop. The 7555/TLC555 are CMOS versions — they work from 2-15V, draw microamps quiescent, have rail-to-rail output, but can only source/sink ~10mA.
Can I vary the frequency while the circuit is running?
Yes. Replace R2 with a potentiometer and fixed resistor in series. The fixed resistor (at least 1kΩ) prevents the pot from going to zero, which would cause excessive discharge current. Alternatively, apply a control voltage to pin 5 to modulate timing.
Why does my frequency drift with temperature?
Timing accuracy depends on resistor and capacitor stability. Carbon film resistors drift ±200ppm/°C; metal film are ±50ppm/°C. Ceramic capacitors (Y5V, Z5U) vary ±15-80% over temperature. Use metal film resistors and C0G/NP0 ceramic or film capacitors for stable timing.
How do I create very long time delays (minutes/hours)?
For delays beyond a few minutes, capacitor leakage becomes significant. Options: (1) Use multiple 555 timers in cascade, (2) Use a 555 to clock a binary counter (CD4020/CD4060), (3) Use a dedicated long-duration timer IC, or (4) Use a microcontroller.
Can I trigger the monostable with a positive-going pulse?
The 555's trigger input (pin 2) is active-LOW. For positive-going triggers, add an inverter (transistor or logic gate), or use a differentiator circuit (capacitor + resistor) to convert the rising edge to a negative spike.
What causes the output to not reach full VCC voltage?
The NE555's output has approximately 1.5V drop when sourcing current (HIGH state is VCC - 1.5V) and 0.5V when sinking (LOW state is ~0.5V). This is normal for bipolar 555s. CMOS versions (7555, TLC555) have rail-to-rail outputs.
How accurate is the 555 timer?
With ideal components, the 555's internal timing is accurate to ±1%. In practice, component tolerances dominate: ±5% resistors and ±20% capacitors give ±25% timing accuracy. For precision applications, use 1% resistors and C0G capacitors, or calibrate with a trimmer.